In Power FET devices, channelstoppers are used to suppress a potential buildup of a parasitic inversion channel in an edge region of the chip. A channelstopper typically comprises a doped area close to the edge region of a chip, which is henceforth called channelstopper terminal. The latter is electrically connected to the backside, or drain, potential of the device. On the surface adjacent to the channelstopper terminal, there is typically provided a field plate comprising a metal, such as aluminium, or another conducting material, which is part of the channelstopper.
It was found experimentally that under certain operating conditions, particularly in the case of a low base doping in the surface-near area of a semiconductor surface, the space-charge region of the device may extend in a lateral direction to reach the region of the channelstopper terminal. This can lead to an injection of minority charge carriers (bipolar injection), and thus to an undesirable increase of a leakage current, especially in the case of p-doped channelstopper terminals. Typically, p-doped channelstoppers are used to simplify the production process of power devices. This undesirable behaviour occurs particularly at high operating temperatures, when the drain-connected channelstopper terminal functions as an effective parasitic transistor. In cases of a very low doping in the surface area, especially in conjunction with vertically varying doping profiles, such as resulting from a doping with protons, negative charges in a concentration range as low as about 1011 cm−2 have shown to be harmful in the described respect. There is no known way to effectively suppress this parasitic effect in conjunction with a p-type channel stopper.
Therefore, it is desirable to have a semiconductor device and a production method therefore, which avoids the abovementioned problems.